GPIO layout on Connect Tech Cogswell board for Nvidia Jetson TX2
GPIO (General Purpose Input Output) gained popularity mainly after their introduction on Raspberry PI's, they facilitate serial communication enabling ways configuration and communicate with serial sensors. Connect Tech carrier boards are available for NVidia Jetson processors such as TX1, TX2 and TX2i which includes GPIO port interfacing on them through GPIO expanders, providing an additional features to gather IO signals from other sensors for IOT developers to explore more ways to enhance their systems. This article attempts to explain GPIO pin layout on ConnectTech Cogwell carrier board for Jetson TX2.
Brief overview of Cogswell
Cogswell carrier board for Nvidia® Jetson processors are specifically designed for Vision processing applications which contains 5x Gigabit ethernet ports of which 4x supports POE, the board is designed to work for GigE Vision Camera's, for further details on the board on Connect Tech Cogswell page.
GPIO pin header at location p7 (see Fig1 above) on Cogswell contains 12 pins, of which 4 are GPIO. By default these pins are configured as input on startup or on reset. When these are configured as output, they can output a maximum of 3.30v. Accordingly to make things simple the pin header has an arrow head indicating the start side of pins, precisely these pins are to be counted in
bottom -> up pattern, so pin #1 is at lower row in the module, for details refer to [Connect Tech GPIO page] (http://connecttech.com/resource-center/kdb342-using-gpio-connect-tech-jetson-tx1-carriers/).
Fig2 is a graphical representation of actual GPIO pins on Cogswell board, Simply speaking, the first four pins in green are GPIO's, pins in black are GND, 2x I2C address and data pins in purple, 2x pins in yellow are RS-232 and finally the pins in red are unavailable as per documentation.
GPIO Pin representation
GPIO pins directly connected to Jetson TX2 module are not configurable, mainly the pins sourced through GPIO expander through I2C bus are only configurable. On Cogswell GPIO expander used is a 8-bit XRA1200 I2C Bus. Notably the physical pin structure differs from logical layout, with I2C interfacing for configuration and reading use little endian format for 8-bit register addressing. Referring to Fig2, GPIO pins in green also show the logical indexing representation in bits, where pin #3 is actually the first pin at index
0. Moreover blue arrows represent the logical flow of pins bit addressing. In simple terms unlike the physical layout which is
bottom -> up the logical layout espcially for GPIO pins is
right -> left
The product serial number for Cogswell is Part #: ASG007